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ADE7880
Table 29. No Load Condition Does Not Function as Defined [er004, Version = 1 Silicon]
Data Sheet
Background
Issue
Workaround
Total active power no load uses the total active energy and the apparent energy to trigger the no load condition. If
neither total active energy nor apparent energy are accumulated for a time indicated in the respective APNOLOAD and
VANOLOAD unsigned, 16-bit registers, the no load condition is triggered, the total active energy of that phase is not
accumulated and no CF pulses are generated based on the total active energy.
Fundamental active and reactive powers no load uses the fundamental active and reactive energies to trigger the no load
condition. If neither the fundamental active energy nor the fundamental reactive energy are accumulated for a time
indicated in the respective APNOLOAD and VARNOLOAD unsigned 16-bit registers, the no load condition is triggered, the
fundamental active and reactive energies of that phase are not accumulated, and no CF pulses are generated based on
the fundamental active and reactive energies.
When the total active energy on Phase x (x = A, B, or C) is lower than APNOLOAD and the apparent energy is above
VANOLOAD, the no load condition should not be triggered. It was observed that although CF pulses continue to be
generated, the Bit 0 (NLOAD) and Bits[2:0] (NLPHASE) in STATUS1 and PHNOLOAD registers continue to be cleared to 0
indicating an out of no load condition, the xWATTHR register stops accumulating energy.
It was observed that the fundamental active energy no load functions independently of the fundamental reactive energy
no load. If, for example, the fundamental active energy is below APNOLOAD and the fundamental reactive energy is
above VARNOLOAD, both energies should continue to accumulate because the phase is out of no load condition. Instead,
the CF pulses, based on the phase fundamental active energy, are not generated and the FWATTHR registers are blocked,
while the CF pulses, based on the fundamental reactive energy, are generated. Thus, the FVARHR registers continue to
accumulate and the Bit 1 (FNLOAD) in the STATUS1 register and Bits[5:3] (FNLPHASE) in the PHNOLOAD register are
cleared to 0.
Because both no load conditions use the APNOLOAD threshold, a workaround for both issues is presented as follows:
?
?
Clear APNOLOAD and VARNOLOAD to 0.
Set VANOLOAD at desired value.
When the Phase x (x = A, B, or C) apparent energy becomes smaller then VANOLOAD, the Bit 2 (VANLOAD) in STATUS1 is
set to 1, together with one of the Bits[2:0] (VANLPHASE) in PHNOLOAD. Then, set APNOLOAD and VARNOLOAD equal to
VANOLOAD.
The Phase x (x = A, B, or C) total active energy enters no load condition.
?
?
?
?
CF pulses stop.
Bit 0 (NLOAD) in the STATUS1 register is set to 1.
One of the Bits[2:0], (NLPHASE[2:0]), in the PHNOLOAD register is set to 1.
The xWATTHR register stops accumulating energy.
The Phase x (x = A, B, or C) fundamental active and reactive energies enter no load condition.
?
?
?
?
CF pulses stop.
Bit 1 (FNLOAD) in the STATUS1 register is set to 1.
One of the Bits[5:3], (FNLPHASE[2:0]), in the PHNOLOAD register is set to 1.
The xFWATTHR and xVARHR registers stop accumulating energy.
Related Issues
None.
SECTION 1. ADE7880 FUNCTIONALITY ISSUES
Reference Number
er001
er002
er003
er004
Description
The LAST_ADD register shows the wrong value for the harmonic calculations registers in SPI mode.
To obtain the best accuracy performance, the internal setting must be changed.
The high-pass filter cannot be disabled in the Phase C voltage data path
The no load condition does not function as defined.
Rev. A | Page 82 of 104
Status
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